The following table lists the clear text identifiers of the CPU feature set (constant array CPUFeatureNames: array[TCPUFeatures] of string):
| TCPUFeatures |
Value |
| cpuft_fpu (bit 0) | 'Floating Point Unit' |
| cpuft_vme (bit 1) | 'V86 Mode Extensions' |
| cpuft_de (bit 2) | 'Debug Extensions - I/O breakpoints supported' |
| cpuft_pse (bit 3) | 'Page Size Extensions (4 MB pages supported)' |
| cpuft_tsc (bit 4) | 'Time Stamp Counter and RDTSC instruction are available' |
| cpuft_msr (bit 5) | 'Model Specific Registers' |
| cpuft_pae (bit 6) | 'Physical Address Extensions (36 bit address, 2MB pages)' |
| cpuft_mce (bit 7) | 'Machine Check Exception supported' |
| cpuft_cx8 (bit 8) | 'Compare Exchange Eight Byte instruction available' |
| cpuft_apic (bit 9) | 'Local APIC present (multiprocessor operation support)' |
| cpuft_sepamd (bit 10) | 'Fast system calls (AMD only)' |
| cpuft_sep (bit 11) | 'Fast system calls' |
| cpuft_mtrr (bit 12) | 'Memory Type Range Registers' |
| cpuft_pge (bit 13) | 'Page Global Enable' |
| cpuft_mca (bit 14) | 'Machine Check Architecture' |
| cpuft_cmov (bit 15) | 'Conditional MOVe instructions' |
| cpuft_pat (bit 16) | 'Page Attribute Table' |
| cpuft_pse36 (bit 17) | '36 bit Page Size Extensions' |
| cpuft_serial (bit 18) | 'Processor Serial Number' |
| cpuft_clflush (bit 19) | 'Cache Flush' |
| cpuft_reserved1 (bit 20) | 'reserved' |
| cpuft_dts (bit 21) | 'Debug Trace Store' |
| cpuft_acpi (bit 22) | 'ACPI support' |
| cpuft_mmx (bit 23) | 'MultiMedia Extensions' |
| cpuft_xsr (bit 24) | 'FXSAVE and FXRSTOR instructions' |
| cpuft_simd (bit 25) | 'SSE instructions' |
| cpuft_simd2 (bit 26) | 'SSE2 (WNI) instructions' |
| cpuft_ss (bit 27) | 'self snoop' |
| cpuft_reserved2 (bit 28) | 'reserved' |
| cpuft_tm (bit 29) | 'Automatic clock control' |
| cpuft_ia64 (bit 30) | 'IA64 instructions' |
| cpuft_3dnow (bit 31) | '3DNow! instructions available' |
BasePack 
